新聞&活動 2021
Oct 24, 2021
Kaviaz Activities
員工旅遊-宜蘭礁溪
Omni Design Announces Silicon Validated Data Converters on TSMC 16nm Process
Omni Design Technologies, a leading provider of high-performance, low-power mixed-signal Intellectual Property (IP) solutions, today announced the availability of silicon-validated 12-bit 6 Gsps analog-to-digital (ADC) and 12-bit 7 Gsps digital-to-analog (DAC) converters on TSMC’s industry-leading 16nm process.
Omni Design and LeddarTech Collaborate to Accelerate Mass Market Deployment of LiDAR for ADAS and Autonomous Vehicles
Omni Design Technologies, a leading provider of high-performance, low-power mixed-signal intellectual property (IP) products, and LeddarTech®, a global leader in Level 1-5 ADAS and AD sensing technology, today announced their collaboration in next-generation LiDAR SoCs that will enable LiDAR manufacturers to design their solid-state LiDAR products for various end markets.
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AMIQ EDA Updates UVM Rule Checks for Latest Release of the Universal Verification Methodology Standard
AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development and analysis, today announced that it has expanded the rules checked by its Verissimo SystemVerilog Testbench Linter to match the latest release (IEEE 1800.2-2020) of the Universal Verification Methodology (UVM) standard.
GUC and Omni Design Tape Out 16nm LiDAR SoC
Global Unichip Corporation (GUC), the advanced ASIC leader, and Omni Design Technologies, a leading provider of high-performance, low-power mixed-signal Intellectual Property (IP) solutions, today announced the successful tape out of a 16nm LiDAR SoC by GUC incorporating Omni Design’s multi-Giga sample Analog-to-Digital Converters (ADC) and other signal chain IP cores.
Xilinx-Compliant Design IP Accessible to Xilinx Customers through Partner Program
SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today confirmed it is a member of the Xilinx Partner Program and offers Design IP optimized for use on Xilinx FPGAs.
May 20, 2021
Kaviaz 重要公告
重要公告
因COVID-19本土疫情升溫為保護員工健康安全，2021/05/20~2021/07/26 公司採取居家辦公，如需來電洽詢，請聯絡各項負責人或來信至信箱 info@kaviaztech.com 我們會盡快與您聯絡。不便之處，敬請見諒。
Apr 30, 2021
Kaviaz Activities
勞動節劍潭山大縱走
HDL Design House selects Silicon Frontline’s P2P Software for Fast, Easy IR Drop and Resistance Mapping
Silicon Frontline Technology, Inc., a leading provider of electrical and physical verification for IC layout, today announced that HDL Design House, a leading-edge digital, analog, and back-end design and verification services provider, has selected the company’s P2P (IR Drop and Resistance Mapping) for fast, early IR Drop analysis and full-chip verification of their CMOS image sensors.
Why Would Anyone Perform Non-Standard Language Checks?
SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today confirmed it is a member of the Xilinx Partner Program and offers Design IP optimized for use on Xilinx FPGAs.